117.198.241.62 at 01:49, 13 August 2009

2009-08-13T01:49:09Z

210.212.202.10: /* ADVANCED COMPUTER ARCHITECTURES */

2009-07-13T11:19:50Z

ADVANCED COMPUTER ARCHITECTURES

← Older revision		Revision as of 16:49, 13 July 2009
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	'''Sub Code: 06CS81 IA Marks :25'''		'''Sub Code: 06CS81 IA Marks :25'''

	'''Hrs/Week: 04 Exam Hours :03'''		'''Hrs/Week: 04 Exam Hours :03'''

	'''Total Hrs: 52 Exam Marks :100'''		'''Total Hrs: 52 Exam Marks :100'''

	<center>'''PART - A'''</center>

			<center>'''PART - A'''
			</center>
			Shridevi Institute of Engineering and Technology, Tumkur


	# '''Fundamentals Of Computer Design 6 Hrs'''		# '''Fundamentals Of Computer Design 6 Hrs'''

	Introduction; Classes of computers; Defining computer architecture; Trends in Technology, power in Integrated Circuits and cost; Dependability; Measuring, reporting and summarizing Performance; Quantitative Principles of computer design.		Introduction; Classes of computers; Defining computer architecture; Trends in Technology, power in Integrated Circuits and cost; Dependability; Measuring, reporting and summarizing Performance; Quantitative Principles of computer design.

	# '''Pipelining 6 Hrs.'''		# '''Pipelining 6 Hrs.'''

	Introduction; Pipeline hazards; Implementation of pipeline; What makes pipelining hard to implement?		Introduction; Pipeline hazards; Implementation of pipeline; What makes pipelining hard to implement?

	# '''Instruction –Level Parallelism – 1 7 Hrs'''		# '''Instruction –Level Parallelism – 1 7 Hrs'''

	ILP: Concepts and challenges; Basic Compiler Techniques for exposing ILP; Reducing Branch costs with prediction; Overcoming Data hazards with Dynamic scheduling; Hardware-based speculation.		ILP: Concepts and challenges; Basic Compiler Techniques for exposing ILP; Reducing Branch costs with prediction; Overcoming Data hazards with Dynamic scheduling; Hardware-based speculation.

	# '''Instruction –Level Parallelism – 2 7 Hrs'''		# '''Instruction –Level Parallelism – 2 7 Hrs'''

	Exploiting ILP using multiple issue and static scheduling; Exploiting ILP using dynamic scheduling, multiple issue and speculation; Advanced Techniques for instruction delivery and Speculation; The Intel Pentium 4 as example.		Exploiting ILP using multiple issue and static scheduling; Exploiting ILP using dynamic scheduling, multiple issue and speculation; Advanced Techniques for instruction delivery and Speculation; The Intel Pentium 4 as example.
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	Concepts in Discrete-Event Simulation: The Event-Scheduling / Time-Advance Algorithm, World Views, Manual simulation Using Event Scheduling; List processing.		Concepts in Discrete-Event Simulation: The Event-Scheduling / Time-Advance Algorithm, World Views, Manual simulation Using Event Scheduling; List processing.

	Simulation in Java; Simulation in GPSS.		Simulation in Java; Simulation in GPSS.

	'''3. Statistical Models in Simulation6 Hrs'''		'''3. Statistical Models in Simulation6 Hrs'''
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	Model building, verification and validation; Verification of simulation models; Calibration and validation of models.		Model building, verification and validation; Verification of simulation models; Calibration and validation of models.

	Optimization via Simulation.		Optimization via Simulation.





	'''Text Books''':		'''Text Books''':
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	'''Sub Code: 06CS833 IA Marks : 25'''		'''Sub Code: 06CS833 IA Marks : 25'''

	'''Hrs/Week: 04 Exam Hours : 03'''		'''Hrs/Week: 04 Exam Hours : 03'''

210.212.202.11: /* Total Hours : 52 Exam Marks: 100 */

2009-01-09T06:19:02Z

Total Hours : 52 Exam Marks: 100

← Older revision		Revision as of 11:49, 9 January 2009
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	<center>'''Signals and Systems'''</center>		<center>'''Signals and Systems'''</center>


	=== Subject Code: 06CS662 I.A. Marks : 25 ===		=== Subject Code: 06CS662 I.A. Marks : 25 ===

Pravs: New page: '''Scheme and Syllabus of Semesters V to VIII of B.E''' '''(With effect from 2006-2007)''' '''Computer Science and Engineering'''
2008-06-28T19:07:07Z

New page: <center>'''Scheme and Syllabus of Semesters V to VIII of B.E'''</center> <center>'''(With effect from 2006-2007)'''</center> <center>'''Computer Science and Engineering'''</center> <c...
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Syllabus Review/VTU/BE/Computer Science and Engineering - Revision history

117.198.241.62 at 01:49, 13 August 2009

210.212.202.10: /* ADVANCED COMPUTER ARCHITECTURES */

210.212.202.11: /* Total Hours : 52 Exam Marks: 100 */