Difference between revisions of "Syllabus Review/VTU/BE/Computer Science and Engineering"
Syllabus Review/VTU/BE/Computer Science and Engineering (view source)
Revision as of 16:49, 13 July 2009
, 16:49, 13 July 2009→ADVANCED COMPUTER ARCHITECTURES
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'''Sub Code: 06CS81 IA Marks :25''' | '''Sub Code: 06CS81 IA Marks :25''' | ||
'''Hrs/Week: 04 | '''Hrs/Week: 04 Exam Hours :03''' | ||
'''Total Hrs: 52 | '''Total Hrs: 52 Exam Marks :100''' | ||
<center>'''PART - A'''</center> | |||
<center>'''PART - A''' | |||
</center> | |||
Shridevi Institute of Engineering and Technology, Tumkur | |||
# '''Fundamentals Of Computer Design | # '''Fundamentals Of Computer Design 6 Hrs''' | ||
Introduction; Classes of computers; Defining computer architecture; Trends in Technology, power in Integrated Circuits and cost; Dependability; Measuring, reporting and summarizing Performance; Quantitative Principles of computer design. | Introduction; Classes of computers; Defining computer architecture; Trends in Technology, power in Integrated Circuits and cost; Dependability; Measuring, reporting and summarizing Performance; Quantitative Principles of computer design. | ||
# '''Pipelining | # '''Pipelining 6 Hrs.''' | ||
Introduction; Pipeline hazards; Implementation of pipeline; What makes pipelining hard to implement? | Introduction; Pipeline hazards; Implementation of pipeline; What makes pipelining hard to implement? | ||
# '''Instruction –Level Parallelism – 1 | # '''Instruction –Level Parallelism – 1 7 Hrs''' | ||
ILP: Concepts and challenges; Basic Compiler Techniques for exposing ILP; Reducing Branch costs with prediction; Overcoming Data hazards with Dynamic scheduling; Hardware-based speculation. | ILP: Concepts and challenges; Basic Compiler Techniques for exposing ILP; Reducing Branch costs with prediction; Overcoming Data hazards with Dynamic scheduling; Hardware-based speculation. | ||
# '''Instruction –Level Parallelism – 2 | # '''Instruction –Level Parallelism – 2 7 Hrs''' | ||
Exploiting ILP using multiple issue and static scheduling; Exploiting ILP using dynamic scheduling, multiple issue and speculation; Advanced Techniques for instruction delivery and Speculation; The Intel Pentium 4 as example. | Exploiting ILP using multiple issue and static scheduling; Exploiting ILP using dynamic scheduling, multiple issue and speculation; Advanced Techniques for instruction delivery and Speculation; The Intel Pentium 4 as example. | ||
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Concepts in Discrete-Event Simulation: The Event-Scheduling / Time-Advance Algorithm, World Views, Manual simulation Using Event Scheduling; List processing. | Concepts in Discrete-Event Simulation: The Event-Scheduling / Time-Advance Algorithm, World Views, Manual simulation Using Event Scheduling; List processing. | ||
Simulation in Java; Simulation in GPSS. | Simulation in Java; Simulation in GPSS. | ||
'''3. Statistical Models in Simulation6 Hrs''' | '''3. Statistical Models in Simulation6 Hrs''' | ||
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Model building, verification and validation; Verification of simulation models; Calibration and validation of models. | Model building, verification and validation; Verification of simulation models; Calibration and validation of models. | ||
Optimization via Simulation. | Optimization via Simulation. | ||
'''Text Books''': | '''Text Books''': | ||
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'''Sub Code: 06CS833 | '''Sub Code: 06CS833 IA Marks : 25''' | ||
'''Hrs/Week: 04 Exam Hours : 03''' | '''Hrs/Week: 04 Exam Hours : 03''' | ||